{"id":20020,"date":"2026-02-20T16:09:37","date_gmt":"2026-02-20T10:39:37","guid":{"rendered":"https:\/\/theeducationoverview.in\/?p=20020"},"modified":"2026-02-20T16:09:51","modified_gmt":"2026-02-20T10:39:51","slug":"dli-scheme-backed-chip-design-startup-vervesemi-microelectronics-raises-10-million-in-a-series-a-funding-round","status":"publish","type":"post","link":"https:\/\/theeducationoverview.in\/?p=20020","title":{"rendered":"DLI Scheme-backed Chip Design Startup \u2014 Vervesemi Microelectronics Raises $10 Million In A Series A Funding Round"},"content":{"rendered":"<div class=\"text-center event-heading-background\">\n<h2 id=\"Titleh2\" style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>DLI Scheme-backed Chip Design Startup \u2014 Vervesemi Microelectronics Raises $10 Million In A Series A Funding Round<\/strong><\/span><\/h2>\n<h3 style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong><br \/>\nSupported by the Govt. \u2014 Vervesemi Taped out Designs for Motor Controller Chips for BLDC Fans, EVs And Drones, And Data Acquisition Chips for Avionics and Space Sector<\/strong><\/span><\/h3>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>Holds Strong portfolio of 140+ semiconductor IPs, 25 Chip Variants, 10 granted patents, and 5 Trade Secrets<\/strong><\/span><\/p>\n<\/div>\n<div id=\"PrDateTime\" class=\"ReleaseDateSubHeaddateTime text-center pt20\" style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>Posted On: 18 FEB 2026 4:49PM by PIB Delhi<\/strong><\/span><\/div>\n<div class=\"pt20\" style=\"text-align: justify;\"><\/div>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>Semiconductor chip design is a critical value driver across the semiconductor value chain, defining system architecture, performance, functionality and security, while contributing up to half of the overall value addition and accounting for 15\u201335% of the bill of materials (BOM) cost of electronic products.<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>Recognising the pivotal role of design in the country\u2019s strategic technological ambitions, the Design Linked Incentive (DLI) Scheme, under the Semicon India Programme, has approved 24 semiconductor design projects from domestic startups and MSMEs for financial support. These companies are developing chips for a range of strategic and commercial applications, including satellite communications, drones, surveillance cameras, Internet of Things (IoT) devices, LED drivers, AI systems, telecom equipment and smart meters.<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>More than 400 organisations (including over 100 startups and 300 academic institutions) have been granted access to advanced chip design tools hosted centrally at C-DAC Bengaluru, cumulatively utilising 2.25 crore hours of tool usage, making this one of the largest user bases globally.<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>Vervesemi Microelectronics<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>Among these, Vervesemi Microelectronics, the first company approved under the Government of India\u2019s DLI Scheme and also supported under the Chips to Startup (C2S) programme, was founded in 2017 by industry veterans with experience at global semiconductor company.<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>The company holds a portfolio of over 140 IPs, 25 IC products, 10 patents and 5 trade secrets, and is developing chips for space, defence, industrial and smart energy applications. Details at https:\/\/vervesemi.com\/<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong><img decoding=\"async\" src=\"https:\/\/static.pib.gov.in\/WriteReadData\/userfiles\/image\/image001TBKT.jpg\" alt=\"\" \/><\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>Some of the key chips designed by Vervesemi are:<\/strong><\/span><\/p>\n<div class=\"table-responsive\" style=\"text-align: justify;\">\n<table class=\"Table\" border=\"1\" cellspacing=\"0\" cellpadding=\"5\">\n<tbody>\n<tr>\n<td><span style=\"color: #3366ff;\"><strong>#<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Chip<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Foundry<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Application<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Status<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Targeted production schedule<\/strong><\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"color: #3366ff;\"><strong>1<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Data Acquisition avionic chip<\/strong><\/span><\/p>\n<p><span style=\"color: #3366ff;\"><strong><em>(Multi-function)<\/em><\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>55nm, UMC<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Identified Space customer<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Fabricated and undergoing customer evaluation<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>2027-Q1<\/strong><\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"color: #3366ff;\"><strong>2<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>BLDC Controller chipset<\/strong><\/span><\/p>\n<p><span style=\"color: #3366ff;\"><strong><em>90% indigenous BOM with Chip-1<\/em><em>\u00a0(Using indigenous RISC-V Microprocessor) and\u00a0Chip-2\u00a0(Quad Gate Driver chip with DC-DC) and\u00a0Chip-3 (Power MOSFET)<\/em><\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>110nm, UMC<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Fan, Exhaust, Solar, Power Inverter<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Controller chip in Fabrication.<\/strong><\/span><\/p>\n<p><span style=\"color: #3366ff;\"><strong>Gate Driver-MOSFET chip Fabricated and undergoing customer evaluation<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>2026 -Q4<\/strong><\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"color: #3366ff;\"><strong>3<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Precision Motor-Control chip\u00a0<em>using RISC-V Microprocessor<\/em><\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>55nm, UMC<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Drones, EV and industrial automation<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Fabricated and undergoing testing<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>2026 -Q3<\/strong><\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"color: #3366ff;\"><strong>4<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Energy metering chip<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>180nm, TSMC<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Energy meter<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Fabricated and tested<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>2026 -Q4<\/strong><\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"color: #3366ff;\"><strong>5<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Bridge Applications chip<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>180nm, TSMC<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Weighing scale and Force Touch application<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>Fabricated and tested<\/strong><\/span><\/td>\n<td><span style=\"color: #3366ff;\"><strong>2026 -Q3<\/strong><\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/div>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>Investor Confidence \u2014 Supporting India\u2019s Deep-Tech Innovation to Scale Global Solutions<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>Vervesemi announced today the raising of $10M\u00a0<em>(about \u20b990 Crore)<\/em>\u00a0in a Series A funding round led by investor Ashish Kacholia and Unicorn India Ventures, with participation from Roots Ventures, Caperize Fina and MAIQ Growth Scheme.<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>The funds will be utilised across three strategic areas. First, the company will accelerate commercialisation of its machine learning-enhanced analog signal chain chip portfolio, including advanced data converters and intelligent power and sensing solutions for industrial, smart energy, motor control and avionics applications.<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>Second, the investment will support production readiness and qualification of existing silicon, along with expansion of engineering and applications teams to serve global customers.<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>Third, the company will expand its IP portfolio and strengthen R&amp;D in next-generation precision analog architectures, while building market presence across Asia, the United States and other key semiconductor markets to engage with original equipment manufacturers and system companies.<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>The investment in Vervesemi reiterates that structured support under the DLI Scheme has strengthened investor confidence and improved commercial viability, leading investors to actively evaluate and commit capital to DLI-approved companies.<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>From Announcement to Realisation: India\u2019s Design-Led Semiconductor Vision Takes Shape<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>The project of BLDC (Brushless Direct Current) motor controller targeted for Fan, Exhaust etc was awarded to Vervesemi by the Minister Shri Ashwini Vaishnaw on 20<sup>th<\/sup>\u00a0March 2025.\u00a0<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong><img decoding=\"async\" src=\"https:\/\/static.pib.gov.in\/WriteReadData\/userfiles\/image\/image002HE3D.jpg\" \/>\u00a0<img decoding=\"async\" src=\"https:\/\/static.pib.gov.in\/WriteReadData\/userfiles\/image\/image003W290.jpg\" \/><\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>During the award ceremony, the Minister stated that the country must collectively adopt three approaches to become a product nation. First, while India has achieved significant success as a service nation, it must now evolve into a product nation, and the development of indigenous software and hardware solutions marks an important step in that direction. Second, innovation should emerge from a broad ecosystem involving academia, startups, students and researchers. Third, the development approach should be incremental and span the full technology spectrum, from high-volume deployment chips such as BLDC motor controllers to high-value strategic platforms like the open-source RISC-V architecture, enabling domestic design of CPUs, GPUs and sustainable technology products for the country.<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>Conclusion<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>In less than a year since the announcement by the Minister, the progress achieved by Vervesemi, both in attracting investment and in user adoption, demonstrates that DLI-supported firms are delivering multiple chip tape-outs, silicon-proven designs, patents, reusable IPs, trained talent and operational design infrastructure, creating tangible on-ground impact.<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>As the ecosystem enters the productization phase, silicon-validated designs will move toward volume manufacturing and deployment, positioning Indian companies as credible global suppliers while strengthening domestic supply chains and self-reliance.<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"color: #3366ff;\"><strong>The DLI Scheme anchors India in the strategic chip design segment by reducing dependence on imports, enhancing resilience to supply-chain disruptions, and ensuring access to critical technologies for defence, telecom, AI and mobility, thereby supporting long-term economic growth.<\/strong><\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p>DLI Scheme-backed Chip Design Startup \u2014 Vervesemi Microelectronics Raises $10 Million In A Series A Funding Round Supported by the Govt. \u2014 Vervesemi Taped out Designs for Motor Controller Chips for BLDC Fans, EVs And Drones, And Data Acquisition Chips for Avionics and Space Sector Holds Strong portfolio of 140+ semiconductor IPs, 25 Chip Variants, &hellip;<\/p>\n","protected":false},"author":2,"featured_media":20021,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[],"class_list":["post-20020","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-education-news"],"_links":{"self":[{"href":"https:\/\/theeducationoverview.in\/index.php?rest_route=\/wp\/v2\/posts\/20020","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/theeducationoverview.in\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/theeducationoverview.in\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/theeducationoverview.in\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/theeducationoverview.in\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=20020"}],"version-history":[{"count":2,"href":"https:\/\/theeducationoverview.in\/index.php?rest_route=\/wp\/v2\/posts\/20020\/revisions"}],"predecessor-version":[{"id":20023,"href":"https:\/\/theeducationoverview.in\/index.php?rest_route=\/wp\/v2\/posts\/20020\/revisions\/20023"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/theeducationoverview.in\/index.php?rest_route=\/wp\/v2\/media\/20021"}],"wp:attachment":[{"href":"https:\/\/theeducationoverview.in\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=20020"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/theeducationoverview.in\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=20020"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/theeducationoverview.in\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=20020"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}